- #PROTEUS FOR FAST DEPLOYMENT FULL#
- #PROTEUS FOR FAST DEPLOYMENT REGISTRATION#
- #PROTEUS FOR FAST DEPLOYMENT CODE#
Session chairs: Arpit Gupta (western hemisphere) & Hongqiang Liu (eastern hemisphere) Go to Slack channel Related Topic Preview(s): Telemetry Programmable switchesĪbstract: Network telemetry is essential for administrators to monitor massive data traffic in a network-wide manner.
#PROTEUS FOR FAST DEPLOYMENT CODE#
Lyra not only generates runnable real-world programs (in both P4 and NPL), but also uses up to 87.5% fewer hardware resources and up to 78% fewer lines of code than human-written programs.ġ2:00 - 1:00 pm EDT & 11:00 - 11:59 pm EDT Technical Session 2: Telemetry: Tell Me More About My Packets
Lyra offers a one-big-pipeline abstraction that allows programmers to use simple statements to express their intent, without laboriously taking care of the details in hardware Lyra also proposes a set of synthesis and optimization techniques to automatically compile this "big-pipeline" program into multiple pieces of runnable chip-specific code that can be launched directly on the individual programmable switches of the target network. This paper presents Lyra, the first cross-platform, high-level language & compiler system that aids the programmers in programming data planes efficiently. As a result, it is arduous and error-prone to develop, maintain, and composite data plane programs in production networks. However, current data plane programs are written in low-level, chip-specific languages (e.g., P4 and NPL) and thus tightly coupled to the chip-specific architecture. A Chipmunk backend for the Tofino programmable switch shows that program synthesis can produce machine code for high-speed switches.Ībstract: Programmable data plane has been moving towards deployments in data centers as mainstream vendors of switching ASICs enable programmability in their newly launched products, such as Broadcom's Trident-4, Intel/Barefoot's Tofino, and Cisco's Silicon One. Chipmunk also produces machine code with fewer pipeline stages than Domino. Using a switch hardware simulator, we show that Chipmunk compiles many programs that a previous rule-based compiler, Domino, rejects. Hence, we develop a new domain-specific synthesis technique, slicing, which reduces compile times by 1-387x and 51x on average. However, naively formulating code generation as program synthesis can lead to long compile times. Chipmunk uses a program synthesis engine, SKETCH, to transform high-level programs down to switch machine code. This paper presents a compiler, Chipmunk, which formulates code generation as a program synthesis problem. However, switch compilers, which use rewrite rules to generate switch machine code, often reject programs because the rules fail to transform programs into a form that can be mapped to a pipeline's limited resources-even if a mapping actually exists.
It is the compiler's responsibility to fit programs into pipeline resources. Session chairs: Xin Jin (western hemisphere) & Vincent Liu (eastern hemisphere) Go to Slack channel Related Topic Preview(s): Programmable SwitchesĪbstract: Writing packet-processing programs for programmable switch pipelines is challenging because of their all-or-nothing nature: a program either runs at line rate if it can fit within pipeline resources, or does not run at all.
#PROTEUS FOR FAST DEPLOYMENT FULL#
The full conference proceedings are available at. If you're asked to sign in, use the workspace name "" to sign up or sign in. Click on the link "Go to slack channel" under each session title to go to the corresponding channel.
#PROTEUS FOR FAST DEPLOYMENT REGISTRATION#
Registered attendees may view the talk and live Q&A through a Zoom session link that will be mailed out through the registration system.Įach session has an associated Slack channel for discussion of papers and/or talks. Each technical session will have two instances, once in a time zone friendly to the western hemisphere and another in a time zone friendly to the eastern hemisphere.įor each paper presented at each technical session, there will a pre-recorded talk of 10-minute duration and a 5-minute live Q&A conducted by the session chair.
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